1. Field
The present disclosure relates to a semiconductor device.
2. Description of Related Art
A technique has been developed which increases the breakdown voltage of a semiconductor module including a power semiconductor device, such as an insulated gate bipolar transistor (IGBT), a free wheeling diode (FWD), or an insulated gate field effect transistor (MOSFET). It is necessary to increase the breakdown voltage of each of the mounted devices in order to increase the breakdown voltage of the semiconductor module. In general, an active region, which is a semiconductor function region formed at the center of a semiconductor substrate, is provided in each semiconductor chip mounted in the power semiconductor device. A metal electrode is provided on the surface of the active region so as to come into contact with the active region. A main current flows in the active region when the semiconductor device is in an on state.
An edge termination region is provided around the semiconductor function region (active region) so as to surround the outside of the front surface side of the substrate at the circumferential end of the semiconductor function region. The edge termination region has an electric field reduction structure for preventing the generation of a region having an electric field higher than that at the center of the bottom of the semiconductor function region (the center of the rear surface of the substrate) when a reverse bias is applied to a main pn junction on the front surface side of the substrate (hereinafter, simply referred to as a main pn junction). The electric field reduction structure means a region which reduces the electric field on the front surface side of the substrate in a drift region to hold the breakdown voltage. For example, a guard ring or a field plate which covers the guard ring is provided as the electric field reduction structure.
The field plate has a function of reducing a high electric field which is likely to be generated in the edge termination region. Specifically, the field plate makes it easier for a depletion layer, which is mainly spread from the main pn junction to the drift layer with an increase in the reverse voltage when the reverse bias is applied to the main pn junction, to be spread in the edge termination region than at the center of the bottom of the semiconductor. Therefore, the gap between the equipotential lines increases and a high electric field generated in the edge termination region is reduced. In addition, the field plate has a function of shielding an external charge (for example, a free ion) which is generated in the vicinity of the front surface of the substrate in the edge termination region due to, for example, a molding resin to suppress a change in the electric field in the vicinity of the interface between the molding resin and the front surface of the semiconductor substrate. Since the change in the electric field is suppressed by the field plate, it is possible to hold the reliability of the breakdown voltage.
The field plate is, for example, a laminate of a plurality of metal films. In many cases, the field plate is formed at the same time as any one of a pad electrode metal film (for example, an aluminum (Al) alloy film (Al—Si (1.5%) alloy film) including 1.5% of silicon (Si)) for wire bonding, a polysilicon film for a gate electrode, and a barrier metal film for preventing diffusion, in order to simplify the process required to form the field plate. The pad electrode metal film, such as an aluminum alloy film, is preferably applied to the uppermost field plates which are easy to arrange with a large gap therebetween since it has a large thickness of 5 μm or more and requires wet etching with a large amount of side etching during a patterning process (patterning). Since the polysilicon film for a gate electrode or the barrier metal for preventing diffusion preferably has a small thickness of 1 μm or less and can be patterned by dry etching, it is particularly suitable to form the lower field plates with a narrow ring interval.
Next, the structure of an edge termination region of a semiconductor device according to the related art will be described. FIG. 2 is a cross-sectional view illustrating the structure of the edge termination region of the semiconductor device according to the related art. FIG. 2 part (a) is a cross-sectional view illustrating a main portion of an edge termination region 200 that surrounds the outer circumference of an active region 201 in which a main current flows. FIG. 2 part (b) is an enlarged cross-sectional view illustrating a dashed frame of FIG. 2 part (a). As illustrated in FIG. 2, the edge termination region 200 which surrounds the outer circumference of the active region 201 is provided in the outer circumference of the active region 201 of a semiconductor substrate 1. An electric field reduction structure including guard rings 2 and first and second field plates 4 and 7 is provided in the edge termination region 200.
Specifically, in the edge termination region 200, five guard rings 2 are provided in a substantially ring shape surrounding the active region 201 in a surface layer of the front surface of the semiconductor substrate 1. In addition, the second field plate 7 is provided on the guard ring 2, with a laminate of a field insulating film 3, the first field plate 4, and an interlayer insulating film 5 interposed therebetween, on the front surface of the semiconductor substrate 1. The first field plate 4 comes into contact with the guard ring 2 through a contact hole provided in the field insulating film 3. The second field plate 7 is made of an aluminum alloy (Al—Si alloy) and is formed at the same time as a main electrode which is formed on the front surface of the substrate in the active region 201.
The second field plates 7 do not need to be formed on all of the guard rings 2. That is, the second field plates 7 may be formed on some or at least one of a plurality of guard rings 2. For example, the second field plates 7 may be arranged on every other guard ring 2 among the plurality of guard rings 2. In this case, it is possible to increase the gap between the second field plates 7. Therefore, even when a thick aluminum alloy film is patterned by wet etching to form the second field plate 7, it is possible to pattern the aluminum alloy film in a short time without any problem, which is preferable.
Next, the structure of the field insulating film 3, the first field plate 4, and the interlayer insulating film 5 will be described in detail with reference to FIG. 2 part (b). The field insulating film 3 is formed on the front surface of the semiconductor substrate 1. A contact hole is provided in the field insulating film 3 at a position corresponding to the surface of each guard ring 2. The first field plate 4 is a polysilicon film which is formed on the field insulating film 3. The polysilicon film which is provided as the first field plate 4 comes into contact with the surface of the guard ring 2 in the contact hole of the field insulating film 3. The polysilicon film (first field plate 4) is formed at the same time as a gate electrode (not illustrated) in the active region 201.
The end of the first field plate 4 protrudes onto the field insulating film 3 which is formed on the surface of a region between the guard rings 2 such that the function of the first field plate 4 can be appropriately fulfilled. Since the polysilicon film (first field plate 4) is a thin film (1 μm), it can be finely patterned by dry etching. Therefore, the gap between the first field plates 4 can be less than the gap between the patterns of the aluminum alloy film which will be the second field plate 7. As a result, it is possible to reduce the influence of an external charge on the electric field in the vicinity of the front surface of the semiconductor substrate 1.
After the first field plate 4 is patterned, the interlayer insulating film 5 is formed on the first field plate 4 at the same time as an interlayer insulating film is formed in the active region 201. Then, the aluminum alloy film is formed as the second field plate 7 on the interlayer insulating film 5 at the same time as the electrode film is formed in the active region 201. A polyimide film 8 serving as a surface protective film which covers the entire front surface of the substrate is formed on the second field plate 7. Although not illustrated in FIG. 2, the first field plate 4 and the second field plate 7 are contacted with each other by a portion (not illustrated) (for example, a corner portion) of each guard ring 2. Therefore, the first and second field plates 4 and 7 each have the same potential as the surface of the guard ring 2.
The following known documents have been proposed for a semiconductor device including the field plate. A device has been proposed which includes a thin polysilicon film that is provided on a guard ring with a ring shape, with an insulating film interposed therebetween, and a two-layer field plate structure including a metal film that is formed on the polysilicon film, with an insulating film interposed therebetween, and is thicker than the polysilicon film (for example, see JP 2008-193043 A (FIG. 1 and abstract)). In addition, a device has been proposed which includes a field plate structure and inserts barrier metal between an aluminum electrode and a semiconductor substrate to connect them (for example, see JP 2009-117715 A (paragraph 0036)). Furthermore, a device has been proposed which has an electrode including a barrier metal layer that is provided on a semiconductor function region or a barrier metal layer and an aluminum layer that is formed on the barrier metal layer (for example, see JP 2001-44414 A (FIG. 1 and Abstract)).